Memories - Materials, Devices, Circuits and Systems (Dec 2023)

Digital-logic assessment of junctionless twin gate trench channel (JL-TGTC) MOSFET for memory circuit applications

  • Ajay Kumar,
  • Neha Gupta,
  • Aditya Jain,
  • Rajeev Gupta,
  • Bharat Choudhary,
  • Kaushal Kumar,
  • Amit Kumar Goyal,
  • Yehia Massoud

Journal volume & issue
Vol. 6
p. 100087

Abstract

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In this paper, Junctionless Twin Gate Trench Channel (JL-TGTC) MOSFET with individual gate control is realized. The device gives full functionality of 2-input digital ‘AND’ and ‘NAND’ logics. The simulation depicts the results in the form of various parameters such as cutoff current, transfer characteristics, and potential profiles. All the simulations regarding device structure and functionality are done on TCAD. This new type of MOS device has improved applicability in low-voltage digital electronics such as sequential circuits etc.

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