Journal of Low Power Electronics and Applications (Apr 2015)
Extensionless UTBB FDSOI Devices in Enhanced Dynamic Threshold Mode under Low Power Point of View
Abstract
This work presents an analysis about the influence of the gate and source/drain underlap length (LUL) on UTBB FDSOI (UltraThin-Body-and-Buried-oxide Fully-Depleted-Silicon-On-Insulator) devices operating in conventional (VB = 0 V), dynamic threshold (DT, VB = VG), and the enhanced DT (eDT, VB = kVG) configurations, focusing on low power applications. It is shown that the underlap devices present a lower off-state current (IOFF at VG = 0 V), lower subthreshold swing (S), lower gate-induced drain leakage (GIDL), higher transconductance over drain current (gm/ID) ratio and higher intrinsic voltage gain (|AV|) due to their longer effective channel length in weak inversion and lower lateral electric field, while the eDT mode presents higher on-state current (ION) with the same IOFF, lower S, higher maximum transconductance (gmmax), lower threshold voltage (VT), higher gm/ID ratio and higher |AV| due to the dynamically reduced threshold voltage and stronger transversal electric field.
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