Line current ripple reduction of two paralleled three‐phase two‐level converter using optimized common‐mode voltage injections

Abstract

Abstract This paper proposes a common‐mode voltage injection‐based pulse width modulation strategy to optimize the AC current ripple of parallel interleaved converters. In general, modulation methods entail a trade‐off between switching times and voltage error. Given the redundancy in the available vector sequences, we sequentially minimize the switching times and the voltage error. Specifically, we propose eight candidate vector sequences with minimized switching times for each 60° sector. Then, we quantitate the current ripple introduced by the eight vector sequences, and according to the calculations, we split each 60° sector into eight subsectors, each employs the respectively optimal vector sequence with the minimized current ripple. For implementation, the candidate vector sequences are further unified by a common‐mode voltage injection scheme. The injection depends on the momentary subsector in which the reference lies. Despite the complex geometry of the subsectors, we propose a simple decision procedure that can be easily implemented in mainstream microcontrollers. Compared to the conventional methods, the proposed common‐mode voltage injection‐based pulse width modulation has a smaller AC current ripple at the same switching loss. The experimental results verify the theoretical analysis and the effectiveness of the proposed common‐mode voltage injection‐based pulse width modulation strategy.

Keywords

• Voltage control
• Current control
• Control of electric power systems
• DC‐AC power convertors (invertors)
• Power convertors and power supplies to apparatus