Novel channel edge doping for hump reduction in LTPS TFTs

Abstract

We proposed a new channel edge doping (CED) technique for hump reduction in n-type low-temperature polycrystalline silicon (LTPS) thin-film transistors (TFTs) and validated it through experiments and technology computer-aided design (TCAD) simulations. The TCAD simulations indicate that the hump effect in LTPS TFTs is due to the high electron (e−) concentration (∼1016 cm−3) induced by an enhanced electric field (e-field) at the channel edge region along the width direction. In order to reduce the hump effect, we focused on decreasing the e− concentration at the channel edge. The CED process led to the selective control of the e− concentration at the channel edge. The decrease in the maximum e− concentration from 3.4 × 1016 to 2.9 × 1014 cm−3 at the channel edge using CED led to an effective reduction in the hump characteristic of LTPS TFTs. Furthermore, the CED process does not require any additional masks and is highly effective in hump reduction, rendering it beneficial for manufacturing active-matrix organic light-emitting diode displays.

Keywords

• low-temperature polycrystalline silicon thin-film transistors
• hump effect
• technology computer-aided design