International Journal of Electronics and Telecommunications (Sep 2022)

Design of Low–power 4-bit Flash ADC Using Multiplexer Based Encoder in 90nm CMOS Process

  • D. S. Shylu Sam,
  • P. Sam Paul,
  • Diana Jeba Jingle,
  • P. Mano Paul,
  • Judith Samuel,
  • J. Reshma,
  • P. Sarah Sudeepa,
  • G. Evangeline

DOI
https://doi.org/10.24425/ijet.2022.141275
Journal volume & issue
Vol. vol. 68, no. No 3
pp. 565 – 570

Abstract

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This work describes a 4-bit Flash ADC with low power consumption. The performance metrics of a Flash ADC depend on the kind of comparator and encoder used. Hence openloop comparator and mux-based encoder are used to obtain improved performance. Simulation results show that the simulated design consumes 0.265mW of power in 90nm CMOS technology using cadence-virtuoso software. The circuit operates with an operating frequency of 100MHz and a supply voltage of 1V.

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