A 10 Gb/s Line Driver in 65 nm CMOS Technology for Radiation-Pervaded and High-Temperature Applications

Abstract

Links able to sustain high-speed data transfer while exposed to radiation phenomena are required by several applications, including aerospace and high-energy physics experiments. To satisfy this need, this paper outlines the design of a radiation-hard line driver for communication up to 10 Gb/s. The driver design is focused on the techniques adopted to increase its radiation hardness, namely the use of long-channel transistors, the avoidance of p-type MOSFETs and thick oxide devices. Circuital strategies to boost driver speed, such as inductive peaking, buffer chaining, and optimal layout placement and routing, are discussed and implemented to compensate for the downsides caused by adopted radiation-hard techniques. The driver, fabricated in 65 nm technology, has been experimentally tested demonstrating its ability to operate up to 10 Gb/s in a radiation-pervaded environment. In particular, after exposure to 1 Grad(SiO2) X-ray, the line driver exhibits an output signal amplitude reduction of 18.3% and a jitter increase of 5.53%. Performed temperature tests highlight that the line driver is capable to operate at 125 °C with 15.9% and 6.7% output signal swing reduction and jitter increase, respectively. The temperature tests also demonstrate the driver’s ability to work up to 160 °C with an output signal swing reduction below 25% and a jitter increase below 12%.

Keywords

• Aerospace
• high energy physics
• high speed
• high temperature
• integrated circuit
• line driver