Implementation and optimisation of pulse compression algorithm on open CL-based FPGA

Abstract

As Moore's law meets bottlenecks, the demand for heterogeneous parallel processing systems is increasing. Field-programmable gate arrays (FPGAs) are becoming more efficient acceleration devices due to their powerful processing performance, and the CPU + FPGA architecture under the OpenCL framework has become the trend of heterogeneous parallel processing systems. This study focuses on the optimisation of pulse compression algorithm in FPGA based on OpenCL, which plays an important role in modern radar signal processing systems. By using double cache for ping–pang storage of data between matched filter and inverse fast Fourier transform (IFFT), an optimised processing method is proposed by using a pipeline and verify the method by using Arria 10 GX1150 FPGA with two groups of 2 GB DDR3; the results show that the proposed method can achieve 2.89× performance improvement over the conventional implementation.

Keywords

• optimisation
• field programmable gate arrays
• pulse compression
• matched filters
• cache storage
• fast fourier transforms
• microprocessor chips
• inverse transforms
• parallel architectures
• opencl framework
• heterogeneous parallel processing systems
• pulse compression algorithm
• optimised processing method
• arria 10 gx1150 fpga
• open cl-based fpga
• moore's law
• field-programmable gate arrays
• efficient acceleration devices
• processing performance
• cpu-fpga architecture
• radar signal processing systems
• double cache
• ping–pang storage
• ddr3
• matched filter
• ifft
• storage capacity 2 gbit