Journal of Low Power Electronics and Applications (Sep 2016)

InGaAs-OI Substrate Fabrication on a 300 mm Wafer

  • Sebastien Sollier,
  • Julie Widiez,
  • Gweltaz Gaudin,
  • Frederic Mazen,
  • Thierry Baron,
  • Mickail Martin,
  • Marie-Christine Roure,
  • Pascal Besson,
  • Christophe Morales,
  • Elodie Beche,
  • Frank Fournel,
  • Sylvie Favier,
  • Amelie Salaun,
  • Patrice Gergaud,
  • Maryline Cordeau,
  • Christellle Veytizou,
  • Ludovic Ecarnot,
  • Daniel Delprat,
  • Ionut Radu,
  • Thomas Signamarcheix

DOI
https://doi.org/10.3390/jlpea6040019
Journal volume & issue
Vol. 6, no. 4
p. 19

Abstract

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In this work, we demonstrate for the first time a 300-mm indium–gallium–arsenic (InGaAs) wafer on insulator (InGaAs-OI) substrates by splitting in an InP sacrificial layer. A 30-nm-thick InGaAs layer was successfully transferred using low temperature direct wafer bonding (DWB) and Smart CutTM technology. Three key process steps of the integration were therefore specifically developed and optimized. The first one was the epitaxial growing process, designed to reduce the surface roughness of the InGaAs film. Second, direct wafer bonding conditions were investigated and optimized to achieve non-defective bonding up to 600 °C. Finally, we adapted the splitting condition to detach the InGaAs layer according to epitaxial stack specifications. The paper presents the overall process flow that achieved InGaAs-OI, the required optimization, and the associated characterizations, namely atomic force microscopy (AFM), scanning acoustic microscopy (SAM), and HR-XRD, to insure the crystalline quality of the post transferred layer.

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