IEEE Journal of the Electron Devices Society (Jan 2016)

High Performance Metal-Gate/High-<inline-formula> <tex-math notation="LaTeX">${\kappa } $ </tex-math></inline-formula> GaN MOSFET With Good Reliability for Both Logic and Power Applications

  • Shih-Han Yi,
  • Dun-Bao Ruan,
  • Shaoyan Di,
  • Xiaoyan Liu,
  • Yung Hsien Wu,
  • Albert Chin

DOI
https://doi.org/10.1109/JEDS.2016.2594837
Journal volume & issue
Vol. 4, no. 5
pp. 246 – 252

Abstract

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The gate-recessed GaN MOSFET on a Si substrate is demonstrated to achieve a record highest normalized transistor current (μCox) of 335 μA/V2 (410 mA/mm at LG = 5 μm and only VG = 4 V), ION/IOFF of 9 orders of magnitude, small 79 mV/dec sub-threshold slope, a low oxide/GaN interface trap density of 1.2 × 1010 eV-1/cm2, a low on-resistance of 17.0 Ω-mm, a high breakdown voltage of 720-970 V, and excellent reliability of only 40 mV ΔVT after 175 °C 1000 s stress at maximum drive current. Such excellent device integrities are due to the high-K gate dielectric and the high conduction band offset (ΔEC) of SiO2/GaN. From the calculation results of self-consistent Schrödinger and Poisson equations, the good reliability of GaN MOSFET is related to the confined carrier density within the GaN channel, which is in sharp contrast to the strong wave-function penetration into the high-trap density AlGaN barrier in the AlGaN/GaN HEMT.

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