Plasma-Enhanced Atomic Layer Deposition-Based Ferroelectric Field-Effect Transistors

Chinsung Park; Prasanna Venkat Ravindran; Dipjyoti Das; Priyankka Gundlapudi Ravikumar; Chengyang Zhang; Nashrah Afroze; Lance Fernandes; Yu Hsin Kuo; Jae Hur; Hang Chen; Mengkun Tian; Winston Chern; Shimeng Yu; Asif Islam Khan

doi:10.1109/JEDS.2024.3434598

IEEE Journal of the Electron Devices Society (Jan 2024)

Plasma-Enhanced Atomic Layer Deposition-Based Ferroelectric Field-Effect Transistors

Chinsung Park,
Prasanna Venkat Ravindran,
Dipjyoti Das,
Priyankka Gundlapudi Ravikumar,
Chengyang Zhang,
Nashrah Afroze,
Lance Fernandes,
Yu Hsin Kuo,
Jae Hur,
Hang Chen,
Mengkun Tian,
Winston Chern,
Shimeng Yu,
Asif Islam Khan

Affiliations

Chinsung Park: ORCiD; School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Prasanna Venkat Ravindran: ORCiD; School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Dipjyoti Das: School of Electronics and Communication Engineering, National Institute of Technology Silchar, Silchar, India
Priyankka Gundlapudi Ravikumar: School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Chengyang Zhang: ORCiD; School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Nashrah Afroze: School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Lance Fernandes: ORCiD; School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Yu Hsin Kuo: ORCiD; School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Jae Hur: ORCiD; Logic Technology Development, Intel Corporation, Hillsboro, OR, USA
Hang Chen: School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Mengkun Tian: School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Winston Chern: School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Shimeng Yu: ORCiD; School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
Asif Islam Khan: School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA

DOI: https://doi.org/10.1109/JEDS.2024.3434598
Journal volume & issue: Vol. 12
pp. 569 – 572

Abstract

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The use of the plasma-enhanced atomic layer deposition (ALD) technique for the deposition of HfO2-based ferroelectrics has received attention in recent years primarily due to wake-up free operation. However, these studies have primarily focused on metal-ferroelectric-metal (MFM) structures. In this work, we investigate the characteristics of ferroelectric field-effect transistors (FEFETs) in which the ferroelectric Hf0.5Zr0.5O2 (HZO) gate stack is deposited using the plasma-enhanced atomic layer deposition (PEALD) technique. We observe that PEALD FEFET requires a higher write voltage for the same memory window compared to an equivalent FEFET with thermal ALD (THALD)-grown HZO. The increase in write voltage in PEALD FEFET occurs primarily due to the increase of the interfacial oxide layer using the plasma process. In addition, we observe that the SiO2 interfacial layer underneath the ferroelectric (FE) HZO layer eliminates the wake-up behavior in both THALD and PEALD FEFETs.

Published in IEEE Journal of the Electron Devices Society

ISSN: 2168-6734 (Online)
Publisher: IEEE
Country of publisher: United States
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering
Website: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245494

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