Journal of Microelectronic Manufacturing (Mar 2020)

Metrology Challenges in 3D NAND Flash Technical Development and Manufacturing

  • Wei Zhang,
  • Jun Xu,
  • Sicong Wang,
  • Yi Zhou,
  • Jian Mi

DOI
https://doi.org/10.33079/jomm.20030102
Journal volume & issue
Vol. 3, no. 1
pp. 1 – 8

Abstract

Read online

3D NAND technical development and manufacturing face many challenges to scale down their devices, and metrology stands out as much more difficult at each turn. Unlike planar NAND, 3D NAND has a three-dimensional vertical structure with high-aspect ratio. Obviously top-down images is not enough for process control, instead inner structure control becomes much more important than before, e.g. channel hole profiles. Besides, multi-layers, special materials and YMTC unique X-Tacking technology also bring other metrology challenges: high wafer bow, stress induced overlay, opaque film measurement. Technical development can adopt some destructive methodology (TEM, etch-back SEM), while manufacturing can only use non-destructive method. These drive some new metrology development, including X-Ray, mass measure and Mid-IR spectroscopy. As 3D NAND suppliers move to >150 layers devices, the existing metrology tools will be pushed to the limits. Still, the metrology must innovate.

Keywords