IEEE Journal of the Electron Devices Society (Jan 2018)

A Novel Gate-Normal Tunneling Field-Effect Transistor With Dual-Metal Gate

  • Stefan Glass,
  • Kimihiko Kato,
  • Lidia Kibkalo,
  • Jean-Michel Hartmann,
  • Shinichi Takagi,
  • Dan Buca,
  • Siegfried Mantl,
  • Zhao Qing-Tai

DOI
https://doi.org/10.1109/JEDS.2018.2864581
Journal volume & issue
Vol. 6
pp. 1070 – 1076

Abstract

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In this combined experiment and simulation study we investigate a SiGe/Si based gate-normal tunneling field-effect transistor (TFET) with a pillar shaped contact to the tunneling junction which brings forth two significant advantages. The first, is improved electrostatics at the boundary of the tunneling junction which helps to diminish the influence of adverse tunneling paths, and thus, substantially sharpens the device turn on. The second, is a simplified fabrication of a dual-metal gate using a self-aligned process. We demonstrate the feasibility of the process and show the positive effect of a dual-metal gate in experiment. Overall the paper provides general guidelines for the improvement of the subthreshold swing in gate-normal TFETs which are not restrained to the material system.

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