IEEE Journal of the Electron Devices Society (Jan 2020)

Novel Driving Methods of Gate Driver for Enhancement- and Depletion-Mode Oxide TFTs

  • Jongsu Oh,
  • Kyung-Mo Jung,
  • Eun Kyo Jung,
  • Jungwoo Lee,
  • Soo-Yeon Lee,
  • Keechan Park,
  • Jae-Hong Jeon,
  • Yong-Sang Kim

DOI
https://doi.org/10.1109/JEDS.2019.2963431
Journal volume & issue
Vol. 8
pp. 67 – 73

Abstract

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This paper introduces novel driving methods of the pull-down unit in a gate driver circuit for enhancement- and depletion-mode a-IGZO thin-film transistors (TFTs). The proposed gate driver circuit can achieve uniform output characteristics and effectively reduce the VOUT ripple voltage because the threshold voltage (VTH) of the pull-down units is compensated regardless of the a-IGZO TFT operation characteristics (enhancement mode: positive value of VTH, depletion mode: negative value of VTH). Many groups proposed the VTH compensation method for pull-down TFTs in the gate driver circuit using a diode connection structure. However, the diode connection structure to extract the VTH value cannot be applied in the depletion-mode oxide TFTs because TFT enters the turn-on state even when the VGS value is 0 V. To solve this problem, we adopted the VTH extraction period only once in one frame time. As a result, our circuit can compensate for VTH of the pull-down unit in the enhancement mode and can be normally operated in the depletion mode. Adjunctively, two low signals (VGL1 and VGL2) and QC node were designed to prevent the leakage current path for Q and VOUT nodes. To verify the threshold voltage tolerance for various stress conditions, we demonstrated the reliability of the circuit according to the threshold voltage change of the TFTs. The simulation result shows that all the VOUT waveforms are maintained at +28 V (VGH) under the VTH shift conditions from -7 V to +11 V; further, the rising time and falling time are less than 0.62 μs and 0.96 μs, respectively. Based on a 120Hz ultra-high definition (UHD) graphics (3840×2160) display panel, the proposed circuit has uniform VOUT characteristics compared to previous VTH compensation circuit when ΔVTH changes from -3 V to +11 V. When ΔVTH changes from -4 V to -7 V, there is also no circuit malfunction, even with slight increase in the falling time and power consumption.

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