Effect of Charge Retention of Non-Volatile Memory TFTs Under Multiple Read Cycles

Abstract

A hydrogenated amorphous silicon thin-film transistor with an engineered charge-trapping interface between the gate dielectric and the channel layer is fabricated to realize non-volatile memory. The memory devices possessed a large memory window and good endurance with an estimated 5-year lifetime. The charge retention lifetime under persistent read bias conditions was found to be ~50% less compared to floating conditions. Measured results indicate the importance of continuous read cycles for estimating the device lifetime and the need for a larger memory window to extend memory operation lifetime.

Keywords

• Hydrogenated amorphous silicon (a-Si:H)
• thin-film transistor (TFT)
• non-volatile memory
• charge trapping