IEEE Journal of the Electron Devices Society (Jan 2018)

Performance of Stacked Nanosheets Gate-All-Around and Multi-Gate Thin-Film-Transistors

  • Yu-Ru Lin,
  • Yi-Yun Yang,
  • Yu-Husien Lin,
  • Erry Dwi Kurniawan,
  • Mu-Shih Yeh,
  • Lun-Chun Chen,
  • Yug-Chun Wu

DOI
https://doi.org/10.1109/JEDS.2018.2873008
Journal volume & issue
Vol. 6
pp. 1187 – 1191

Abstract

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This comprehensive study of the horizontally p-type stacked nanosheets inversion mode thinfilm transistor with gate-all-around (SNS-GAATFT) and multi-gate (SNS-TFT) structures. The stacked nanosheets device structure, fabrication, and electrical characteristics are analyzed. The SNS-GAATFT reveals better performance to multi-gate SNS-TFT. The proposed inversion mode SNS-TFT has properties of the easy process with low cost and compatible with all 3-D Si CMOS and AMOLED applications. Moreover, the SNS-GAATFT is suitable for future monolithic 3-D IC for 2015's ITRS technology roadmap for the year 2024-2030.

Keywords