IEEE Journal of the Electron Devices Society (Jan 2021)

A Comparative Study of AC Positive Bias Temperature Instability of Germanium nMOSFETs With GeO₂/Ge and Si-cap/Ge Gate Stack

  • Rui Gao,
  • Jigang Ma,
  • Xiaoling Lin,
  • Xiaowen Zhang,
  • Yunfei En,
  • Guoguang Lu,
  • Yun Huang,
  • Zhigang Ji,
  • Hong Yang,
  • Weidong Zhang,
  • Jianfu Zhang

DOI
https://doi.org/10.1109/JEDS.2021.3078540
Journal volume & issue
Vol. 9
pp. 539 – 544

Abstract

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AC positive bias temperature instability (PBTI) of germanium nMOSFETs with GeO2/Ge and Si-cap/Ge gate stack was investigated in this brief. AC-DC-AC alternating PBTI stress tests were conducted on both types of devices, the experiment data shows the inserted DC stress phase has little impact on the following AC stress kinetics on GeO2/Ge nMOSFETs but introduce a significant “additional DC generation” on Si-cap/Ge devices. The “additional DC generation” is ascribed to the existence of energy alternating defects (EAD) according to previous studies. Energy distribution under DC and AC stress further demonstrate that EAD are significant on Si-cap/Ge but negligible on GeO2/Ge devices. Effective lifetime prediction is carried out and compared under DC stress after discharge (with a purposely introduced measurement delay) and AC stress on both GeO2/Ge and Si-cap nMOSFETs. The results show GeO2/Ge nMOSFETs’ effective lifetime exhibits no difference under two stress modes, while Si-cap/Ge nMOSFETs’ effective lifetime is underestimated using DC stress after discharge approximation without considering the EAD-induced “additional DC generation”. An extra 0.14V 10-year Vdd design margin can be obtained for Si-cap/Ge nMOSFETs to gain higher performance by taking “additional DC generation” into account. The conclusion is beneficial for process optimization and PBTI reliability improvement of Ge nMOSFETs.

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