Enhancing Near-Infrared Photodetection Efficiency in SPAD With Silicon Surface Nanostructuration

Abstract

We propose a straightforward technique to increase the near-infrared photo-detection efficiency (PDE) in single photon avalanche photodiodes (SPAD) manufactured in CMOS industrial foundries, without any change in the usual semiconductor process flow. The mask used for the photolithography of shallow trench isolation (STI) is modified to generate sub-wavelength patterns in the silicon area illuminated by incident light. The dimensions of the nanostructures are easily accessible by standard UV-lithography. The resulting improved anti-reflection effect and absorption in Si due to diffraction can provide up to 50% relative gain in PDE at 850-nm wavelength in simulation, while 25% gain is demonstrated in this paper, without degrading the median dark count rate (DCR) at ambient temperature. Some performance degradation is observed with the appearance of after-pulses, possibly due to the absence of surface passivation specific to the nanostructures in this first demonstration. The effect is angularly robust, relatively broadband, and relatively tolerant to fabrication errors. High PDE enables longer range or lower power consumption in applications for distance measurement with an active illumination, such as proximity sensing, 3-D ranging, or 3-D imaging.

Keywords

• Avalanche photodiodes
• CMOS image sensors
• CMOS process
• nanophotonics
• gratings
• surface structures