Channel Design Optimization for 1.2-kV 4H-SiC MOSFET Achieving Inherent Unipolar Diode 3^rd Quadrant Operation

Abstract

SiC Schottky Barrier Diodes (SBDs) have been used in parallel with SiC MOSFETs as a freewheeling diode in power converter applications because the inherent PN body diode of the MOSFET has relatively high forward voltage drop, considerable reverse recovery current, and suffers from the expansion of stacking faults over the lifetime of the device [1]. However, an additional external diode requires extra space within a multi-chip package or power module, and adds undesirable parasitic inductance to the power loop during commutation events of the power converter. Alternatively, when the unipolar diode structure is integrated within the MOSFET, a significant reduction in wafer area is achieved by sharing active and edge termination areas. Monolithic integration of Schottky or JBS diode in a SiC MOSFET structure (JBSFET) and SiC MOSFET integrating the unipolar internal inverse channel diode were reported earlier [2]–[5], respectively. However, JBSFET from [2] has higher specific on-resistance due to the larger cell pitch from the portion of JBS diode when compared with standalone MOSFET. For [5], the fabrication of the proposed MOSFET requires a very thin and heavily doped epitaxial regrowth process, which may result in a complicated process.

Keywords

• SiC
• MOSFETs
• channel length
• channel diode
• channel doping
• gate oxide