A New Figure of Merit, ${\Delta V_{\text {DIBLSS}} /(I_{\rm {d},{\mathrm{ sat}}} /I_{\rm {sd},{\mathrm{ leak}}} )}$ , to Characterize Short-Channel Performance of a Bulk-Si n-Channel FinFET Device

Abstract

This paper aims to investigate the device parameters, including drain-induced barrier lowering (DIBL), subthreshold swing (SS), and saturation drive current, Id,sat, of bulk-Si n-channel FinFET devices (bulk n-FinFETs). The impact of lightly doped drain (LDD) process on the performance of bulk n-FinFETs is also examined in this paper. According to our measured data, excluding LDD in bulk n-FinFETs not only reduces mask costs but it also enables slightly better short-channel control compared to the inclusion of LDD. A new figure of merit, ΔVDIBLSS/(Id,sat/Isd,leak), is introduced for monitoring short-channel performance of bulk n-FinFETs, where ΔVDIBLSS accounts for the DIBL and SS, and Isd,leak is the source/drain subthreshold off-state leakage current.

Keywords

• Logic figures of merit (FoMs)
• bulk n–FinFETs
• lightly doped drain (LDD)
• short–channel control
• $\Delta V_{\mathrm{ DIBLSS}} $ %22%2C%22default_operator%22%3A%22AND%22%7D%7D%7D"> <italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> <inline-formula> <tex-math notation="LaTeX">$\Delta V_{\mathrm{ DIBLSS}} $ </tex-math> </inline-formula> </italic>
• $I_{\rm d,{\mathrm{ sat}}} /I_{\rm sd,{\mathrm{ leak}}}$ %22%2C%22default_operator%22%3A%22AND%22%7D%7D%7D"> <italic xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"> <inline-formula> <tex-math notation="LaTeX">$I_{\rm d,{\mathrm{ sat}}} /I_{\rm sd,{\mathrm{ leak}}}$ </tex-math> </inline-formula> </italic>