III-V Heterostructure Nanowire Tunnel FETs

Erik Lind; Elvedin Memisevic; Anil W. Dey; Lars-Erik Wernersson

doi:10.1109/JEDS.2015.2388811

IEEE Journal of the Electron Devices Society (Jan 2015)

III-V Heterostructure Nanowire Tunnel FETs

Erik Lind,
Elvedin Memisevic,
Anil W. Dey,
Lars-Erik Wernersson

Affiliations

Erik Lind: Department of Electrical and Information Technology, Lund University, Lund, Sweden
Elvedin Memisevic: Department of Electrical and Information Technology, Lund University, Lund, Sweden
Anil W. Dey: Department of Electrical and Information Technology, Lund University, Lund, Sweden
Lars-Erik Wernersson: Department of Electrical and Information Technology, Lund University, Lund, Sweden

DOI: https://doi.org/10.1109/JEDS.2015.2388811
Journal volume & issue: Vol. 3, no. 3
pp. 96 – 102

Abstract

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In this paper, InAs/GaSb nanowire tunnel field-effect transistors (TFETs) are studied theoretically and experimentally. A 2-band 1-D analytic tunneling model is used to calculate the on- and off-current levels of nanowire TFETs with staggered source/channel band alignment. Experimental results from lateral InAs/GaSb are shown, as well as first results on integration of vertical InAs/GaSb nanowire TFETs on Si substrates.

Published in IEEE Journal of the Electron Devices Society

ISSN: 2168-6734 (Online)
Publisher: IEEE
Country of publisher: United States
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering
Website: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245494

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