Schottky Barrier Height Engineering in <italic>&#x03B2;</italic>-Ga₂O₃ Using SiO₂ Interlayer Dielectric

Abstract

This paper reports on the modulation of Schottky barrier heights (SBH) on three different orientations of β-Ga2O3 by insertion of an ultra-thin SiO2 dielectric interlayer at the metal-semiconductor junction, which can potentially lower the Fermi-level pinning (FLP) effect due to metal-induced gap states (MIGS). Pt and Ni metal-semiconductor (MS) and metal-interlayer-semiconductor (MIS) Schottky barrier diodes were fabricated on bulk n-type doped β-Ga2O3 single crystal substrates along the (010), (-201) and (100) orientations and were characterized by room temperature current-voltage (I-V) and capacitance-voltage (C-V) measurements. Pt MIS diodes exhibited 0.53 eV and 0.37 eV increment in SBH along the (010) and (-201) orientations respectively as compared to their respective MS counterparts. The highest SBH of 1.81 eV was achieved on the (010)-oriented MIS SBD using Pt metal. The MIS SBDs on (100)-oriented substrates exhibited a dramatic increment (> 1.5 ×) in SBH as well as reduction in reverse leakage current. The use of thin dielectric interlayers can be an efficient experimental method to modulate SBH of metal/Ga2O3 junctions.

Keywords

• Gallium oxide
• Schottky contact
• metal-insulater-semiconductor
• Fermi-level pinning
• power device