IEEE Journal of the Electron Devices Society (Jan 2018)

Ge FinFET CMOS Inverters With Improved Channel Surface Roughness by Using <italic>In-Situ</italic> ALD Digital O<sub>3</sub> Treatment

  • M.-S. Yeh,
  • G.-L. Luo,
  • F.-J. Hou,
  • P.-J. Sung,
  • C. J. Wang,
  • C.-J. Su,
  • C.-T. WU,
  • Y.-C. Huang,
  • T.-C. Hong,
  • B.-Y. Chen,
  • K.-M. Chen,
  • Y.-C. WU,
  • M. Izawa,
  • M. Miura,
  • M. Morimoto,
  • H. Ishimura,
  • Y.-J. Lee,
  • W.-F. Wu,
  • W.-K. Yeh

DOI
https://doi.org/10.1109/JEDS.2018.2878929
Journal volume & issue
Vol. 6
pp. 1227 – 1232

Abstract

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Improved electrical characteristics of CMOS inverters composed of Ge n- and p-finFETs were demonstrated by utilizing newly introduced Ge surface treatments. In-situ digital O3 treatment in ALD chamber was adopted on the surface of Ge fin sidewall in order to reduce the roughness and etching damages through the GeO desorption mechanism. The treatment effects were checked by AFM and C-V measurements. By combining this treatment with optimized microwave annealing, sub-threshold slope and the $\text{I}_{\mathrm{ ON}}/\text{I}_{\mathrm{ OFF}}$ ratio were remarkably improved in both n-finFET and p-finFET, and Ge CMOS inverters with high voltage gain of 50.3 V/V at low ${V}_{D}= 0.6$ V was realized. Finally, simulations on an ideal Ge CMOS inverter were presented.

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