IEEE Journal of the Electron Devices Society (Jan 2018)

Cryogenic Temperature Characterization of a 28-nm FD-SOI Dedicated Structure for Advanced CMOS and Quantum Technologies Co-Integration

  • P. Galy,
  • J. Camirand Lemyre,
  • P. Lemieux,
  • F. Arnaud,
  • D. Drouin,
  • Michel Pioro-Ladriere

DOI
https://doi.org/10.1109/JEDS.2018.2828465
Journal volume & issue
Vol. 6
pp. 594 – 600

Abstract

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Silicon co-integration offers compelling scale-up opportunities for quantum computing. In this framework, cryogenic temperature is required for the coherence of solid-state quantum devices. This paper reports the characterization of an nMOS quantum-dot dedicated structure below 100 mK. The device under test is built in thin silicon film fabricated with 28 nm high-k metal gate ultra-thin body and ultra-thin buried oxide advanced CMOS technology. The MOS structure is functional with improved performances at cryogenic temperature. The results open new research avenues in CMOS co-integration for quantum computing applications within the FD-SOI platform.

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