Influence of the Gate Height Engineering on the Intrinsic Parameters of UDG-MOSFETs With Nonquasi Static Effect

Abstract

This paper presents the results of a systematic theoretical investigation on the impact of gate height on the analog and radio-frequency (RF) performances of underlap-FinFET devices. The conventional underlap-FinFETs offer lower on current (Ion) and higher distributed channel resistance (Rch). This paper shows that a higher gate height improves both Ion and Rch due to higher gate side-wall fringing fields. In this paper, the various figure of merits (FOMs) for analog applications of the underlap-FinFETs such as drain current (Ids), transconductance (gm), transconductance generation factor (gm/Ids), output resistance (Ro), and intrinsic gain (gmRo) are systematically analyzed for different values of gate height and reported. The RF FOMs studied include intrinsic capacitances (Cgs, Cgd) and resistances (Rgs, Rgd), transport delay (τm), cutoff frequency (fT), and the transit frequency of maximum available power gain (fMAX). This paper clearly demonstrates that the gate height is a critical technology parameter in improving the analog performance of underlap-FinFETs.

Keywords

• Underlap-FinFET
• Gate Height
• NQS
• Intrinsic Parameter
• Common Source Amplifier