IEEE Journal of the Electron Devices Society (Jan 2017)

Demonstration of GaN Static Induction Transistor (SIT) Using Self-Aligned Process

  • Wenwen Li,
  • Dong Ji,
  • Ryo Tanaka,
  • Saptarshi Mandal,
  • Matthew Laurent,
  • Srabanti Chowdhury

DOI
https://doi.org/10.1109/JEDS.2017.2751065
Journal volume & issue
Vol. 5, no. 6
pp. 485 – 490

Abstract

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The rapid development of RF power electronics requires amplifier operating at high frequency with high output power. GaN-based HEMTs as RF devices have made continuous progress in the last two decades showing great potential for working up to G band range. However, vertical structure is preferred to obtain higher output power. In this paper, we have designed and fabricated GaN static induction transistor using the self-aligned technology, which was accomplished mainly by using a SiO2 lift-off step in buffered oxide etch (BOE). By optimizing the time in ultrasonic bath and in BOE, the SiO2 and the metal on top were removed completely which resulted in the gate metal only on the sidewalls. Both dry and wet etch techniques were investigated to reduce the gate leakage on the etched surface. The low power dry etch combined with the tetramethylammonium hydroxide wet etch can effectively reduce the etch damages, decrease the gate leakage and enhance the gate control over the channel.

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