A High-Performance SiC Super-Junction MOSFET With a Step-Doping Profile

Abstract

In this article, we investigate a 4H-SiC super- junction (SJ) MOSFET structure with a charge-imbalance doping-profile. According to our numerical simulations and comparisons with the conventional SiC VDMOS (C-VDMOS) and SiC SJ VDMOS (SJ-VDMOS) devices, the SJ-MOD structure offers a better trade-off between breakdown voltage (BV) and specific on-resistance ( $R_{on,sp}$ ). This leads to a high figure of merit ( $FOM=BV^{2}/R_{on,sp}$ ). In addition, due to the reduced electric field peak, the single-event burnout (SEB) of the device is significantly improved. The simulation results indicate that, using a LET value of 0.1 pC/ ${\mu }\text{m}$ and a 3000K global device temperature as the criterion for burning, the specific burnout-threshold voltage (using the optimal parameters of the proposed structure) exceeds that of the conventional structure. This indicates that the modified super-junction structure can indeed be used for different voltage-classes of the hardening SiC super-junction devices in the future.

Keywords

• SiC MOSFET
• breakdown voltage
• specific on-resistance
• figure of merit