Via Diode in Cu Backend Process for 3D Cross-Point RRAM Arrays

Yu-Cheng Liao; Hsin-Wei Pan; Min-Che Hsieh; Tzong-Sheng Chang; Yu-Der Chih; Ming-Jinn Tsai; Chrong Jung Lin; Ya-Chin King

doi:10.1109/JEDS.2014.2339296

IEEE Journal of the Electron Devices Society (Jan 2014)

Via Diode in Cu Backend Process for 3D Cross-Point RRAM Arrays

Yu-Cheng Liao,
Hsin-Wei Pan,
Min-Che Hsieh,
Tzong-Sheng Chang,
Yu-Der Chih,
Ming-Jinn Tsai,
Chrong Jung Lin,
Ya-Chin King

Affiliations

Yu-Cheng Liao: Institute of Electronics Engineering, National Tsing Hua University, Hsinchu, Taiwan
Hsin-Wei Pan: Institute of Electronics Engineering, National Tsing Hua University, Hsinchu, Taiwan
Min-Che Hsieh: Institute of Electronics Engineering, National Tsing Hua University, Hsinchu, Taiwan
Tzong-Sheng Chang: Process Integration Division, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan
Yu-Der Chih: Design Technology Division, Taiwan Semiconductor Manufacturing Company, Hsinchu, Taiwan
Ming-Jinn Tsai: Electronics and Optoelectronics Research Laboratory, Industrial Technology Research Institute, Hsinchu, Taiwan
Chrong Jung Lin: Institute of Electronics Engineering, National Tsing Hua University, Hsinchu, Taiwan
Ya-Chin King: Institute of Electronics Engineering, National Tsing Hua University, Hsinchu, Taiwan

DOI: https://doi.org/10.1109/JEDS.2014.2339296
Journal volume & issue: Vol. 2, no. 6
pp. 149 – 153

Abstract

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In this paper, a fully logic compatible via diode is developed for high-density resistive random access memory (RRAM) array applications. This novel via diode is realized by advanced 28nm CMOS technology with Cu damascene via. The device is stacked between a top Cu via and a bottom Cu metal with a composite layer of TaN/TaON based dielectric film. An asymmetric current-voltage characteristic in this MIM structure provides a forward/reverse current ratio up to 106. In a cross-point RRAM array, the suppression of sneak current path by incorporating this via diode enables array size to be greatly expended. Via diode provides an excellent solution for high-density embedded nonvolatile memory applications in the nano-scale CMOS technology.

Published in IEEE Journal of the Electron Devices Society

ISSN: 2168-6734 (Online)
Publisher: IEEE
Country of publisher: United States
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering
Website: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245494

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