IEEE Journal of the Electron Devices Society (Jan 2023)

Four Hybrid Gates SOI Lateral Insulated Gate Bipolar Transistor With Improved Carrier Controllability

  • Jie Ma,
  • Yong Gu,
  • Chengwu Pan,
  • Long Zhang,
  • Guiqiang Zheng,
  • Siyang Liu,
  • Weifeng Sun,
  • Changyuan Chang,
  • Sen Zhang

DOI
https://doi.org/10.1109/JEDS.2023.3274133
Journal volume & issue
Vol. 11
pp. 288 – 293

Abstract

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Easy inter-connection is a crucial advantage of the single-chip power ICs, which makes power devices with multiple ports easy to improve carrier controllability without increasing process difficulty. Electrical characteristics of the power devices get further improved thanks to the advanced carrier controllability. In this paper, a silicon-on-isolator lateral IGBT (SOI-LIGBT) featured four hybrid gates is proposed to obtain outstanding carrier controllability in turn-on, turn-off and short-circuit conditions for the first time. Four hybrid gates include three planar gates (G1, G2 and G3) and a trench gate (G4), of which G3 and G4 are grounded gate to lower saturation current and suppress latch up. Low turn-off time $(t_{OFF})$ , di/dt and improved short-circuit withstanding capability are obtained through providing different input signals to these gates. In the turn-on, G2 is pre-charged to a stable voltage equal to gate voltage $(V_{G1})$ to suppress the high di/dt before $V_{G1}$ starts to rise. In the turn-off, a P-type inversion is induced by the negative voltage of ${\mathrm{ G}}_{2}~(V_{G2})$ , which provides a low-resistance hole current path to extract the stored holes. In the short-circuit condition, G3 and G4 are both shorted to the ground to lower the saturation current and suppress the activation of parasitic NPN transistor, resulting in an improved short-circuit withstanding time $(t_{SC})$ . Compared with the conventional SOI-LIGBT, $t_{OFF}$ and di/dt are reduced by 43.6% and 53.08%, and $t_{SC}$ is prolonged from $3.04\mu \text{s}$ to $8.89\mu \text{s}$ at DC bus voltage of 400V.

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