Guest Editorial Special Section on the Second Electron Devices Technology and Manufacturing (EDTM) Conference 2018

Kazunari Ishimaru; Naoto Horiguchi; Kazuo Nojiri; Paul Lining Zhang; Paul R. Berger

doi:10.1109/JEDS.2018.2884554

IEEE Journal of the Electron Devices Society (Jan 2018)

Guest Editorial Special Section on the Second Electron Devices Technology and Manufacturing (EDTM) Conference 2018

Kazunari Ishimaru,
Naoto Horiguchi,
Kazuo Nojiri,
Paul Lining Zhang,
Paul R. Berger

Affiliations

Kazunari Ishimaru: Toshiba Memory Corporation, Institute of Memory Technology Research and Development, Tokyo, Japan
Naoto Horiguchi: Logic Technology Department, imec, Leuven, Belgium
Kazuo Nojiri: Lam Research Co. Ltd., Yokohama, Japan
Paul Lining Zhang: Shenzhen University, Shenzhen, China
Paul R. Berger: Ohio State University, Columbus, OH, USA

DOI: https://doi.org/10.1109/JEDS.2018.2884554
Journal volume & issue: Vol. 6
pp. 1197 – 1199

Abstract

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Performance improvement by simple device scaling is running out of steam. Design and Technology Co-Optimization (DTCO) and System and Technology Co-Optimization (STCO) are the hot topics to overcome scaling issues by collaboration among device, circuit, and system communities. Another approach is seeking device innovation from manufacturing side with material and process communities.

Published in IEEE Journal of the Electron Devices Society

ISSN: 2168-6734 (Online)
Publisher: IEEE
Country of publisher: United States
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering
Website: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245494

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