Design and Thermal Analysis of 2.5D and 3-D Integrated System of a CMOS Image Sensor and a Sparsity-Aware Accelerator for Autonomous Driving

Abstract

For the autonomous driving application, data movement has increased rapidly between a CMOS Image sensor (CIS) and the processor due to increase in image resolution. Advanced packaging techniques like 2.5D/3D integration have been proposed to reduce the data movement energy between memory and processor. In this work, we explore the use of such techniques to integrate a CIS and a backend accelerator on a silicon interposer. The data movement energy from CIS to the accelerator is thus reduced by $100\times $ compared to using the conventional MIPI links. We perform thermal simulations to study the impact of the thermal coupling of CIS and accelerator and ensure a peak temperature increase of less than $5~^{\circ }$ C. We also vary the distance between the CIS and the processor to study the trade-offs between energy savings and peak temperature. Next, we assume the 3D stacked CIS and accelerator to reduce the data movement further and obtain an energy efficiency of 45.81 TOPS/W. Now we observe a heat dissipation challenge with an increase in the peak temperature of more than $85~^{\circ }$ C. Hence, we scale down the operational frequency and study the trade-off between performance degradation and reduction in peak temperature, while maintaining the accurate multi-object tracking on the BDD100k dataset for autonomous driving.

Keywords

• 3D-stacked CIS
• advanced packaging
• 2.5D/3D integration
• thermal modeling
• near-pixel compute
• hardware accelerator