Dimension Effect on Breakdown Voltage of Partial SOI LDMOS

Yue Hu; Huazhen Liu; Qianqian Xu; Luwen Wang; Jing Wang; Shichang Chen; Peng Zhao; Ying Wang; Gaofeng Wang

doi:10.1109/JEDS.2017.2690363

IEEE Journal of the Electron Devices Society (Jan 2017)

Dimension Effect on Breakdown Voltage of Partial SOI LDMOS

Yue Hu,
Huazhen Liu,
Qianqian Xu,
Luwen Wang,
Jing Wang,
Shichang Chen,
Peng Zhao,
Ying Wang,
Gaofeng Wang

Affiliations

Yue Hu: Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Zhejiang, China
Huazhen Liu: Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Zhejiang, China
Qianqian Xu: Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Zhejiang, China
Luwen Wang: Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Zhejiang, China
Jing Wang: Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Zhejiang, China
Shichang Chen: Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Zhejiang, China
Peng Zhao: Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Zhejiang, China
Ying Wang: Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Zhejiang, China
Gaofeng Wang: ORCiD; Key Laboratory of RF Circuits and Systems, Ministry of Education, Hangzhou Dianzi University, Zhejiang, China

DOI: https://doi.org/10.1109/JEDS.2017.2690363
Journal volume & issue: Vol. 5, no. 3
pp. 157 – 163

Abstract

Read online

Dimension effect on breakdown voltage (BV) of lateral double-diffused metal-oxide- semiconductor field-effect transistor in partial silicon-on-insulator (PSOI) technology is comprehensively studied. The maximum BV (BVmax) is examined under various settings of the device length L and the active silicon film thickness t. It is shown that there exists an optimal pair of (L, t) for PSOI at which the highest BV can be achieved. The ratio of L/t is better chosen between 5 and 7 for the device designs, in particular, L/t = 6 can be considered as the optimal one theoretically. Moreover, impacts of the silicon window length Lw and the drift doping concentration Ndr on the BV, the on-resistance (Ron) and the figure-of-merit (=BV2/Ron) are also carefully studied.

Published in IEEE Journal of the Electron Devices Society

ISSN: 2168-6734 (Online)
Publisher: IEEE
Country of publisher: United States
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering
Website: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245494

About the journal

Abstract

Keywords