Ultra-High Mobility in Dielectrically Pinned CVD Graphene

Abstract

We report improved control over the quality and uniformity of CVD graphene devices through a novel fabrication technique. An overlying HSQ pinning dielectric is used to physically anchor and protect the graphene sheet, resulting in electron and hole motilities of 25 600 and 23 700 cm2/Vs, respectively, record-breaking values for CVD graphene devices. Transitioning from traditional 3-D bulk materials to loosely adhered 2-D graphene sheets, the presented process is expected to bring new focus to post-transfer passivation as a means of fabricating graphene devices closer to their theoretical limits. Based on the extracted mean-free-path (MFP) from the experimental data, the graphene interconnect is benchmarked against the copper interconnect at various widths and edge roughness. Results demonstrate the importance of edge smoothness and MFP, which dictate the potential benefits of graphene interconnects at a narrow dimension.

Keywords

• CVD graphene
• dielectric screening
• electron mobility
• energy-delay product
• interconnects
• mean-free-path