Optimization of Bump Defect at High-Concentration <italic>In-Situ</italic> Phosphorus Doped Polysilicon/TEOS Oxide Interface for 3D NAND Flash Memory Application

Abstract

In the 3D NAND Flash memory manufacturing process, high-concentration in-situ phosphorus-doped polysilicon and TEOS oxide stack will produce bump defects at the interfaces, causing pattern defects and electrical failures. The formation mechanism of bump defects caused by oxygen-containing groups and phosphorus at the lower and upper interfaces of phosphorus-doped polysilicon is investigated in detail. Two methods were demonstrated to reduce bump defects, wet processing and Rapid Thermal Oxidation (RTO). The wet processing is to remove oxygen-containing groups and phosphorus, while the RTO process increases the solubility of phosphorus in silicon. Both methods have significantly reduced bump defects and greatly increased the yield rate, and further verify the proposed formation mechanism of bump defects.

Keywords

• Bump defects
• phosphorus-doped polysilicon
• TEOS
• wet processing
• RTO