IEEE Journal of the Electron Devices Society (Jan 2015)

Exploiting Hetero-Junctions to Improve the Performance of III–V Nanowire Tunnel-FETs

  • Marco G. Pala,
  • Sylvan Brocard

DOI
https://doi.org/10.1109/JEDS.2015.2395719
Journal volume & issue
Vol. 3, no. 3
pp. 115 – 121

Abstract

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This paper presents full-quantum 3-D simulations predicting the electrical performance of nanowire tunnel-FETs based on III-V hetero-junctions. Our calculations exploit an eight-band k·p Hamiltonian within the nonequilibrium Green's functions formalism and include phonon scattering. It is shown that the on-current of GaSb/InAs hetero-junction tunnel-FETs is limited by quantum confinement effects on the bandstructure induced by the small nanowire diameter necessary to preserve an optimal electrostatic integrity at short gate lengths. To circumvent this problem, additional on-current improvements with no substantial subthreshold swing degradation can be achieved by engineering the source region through the insertion of an InAs/GaSb/InAs quantum well along the transport direction. Such a design option is predicted to provide on/off-current ratios larger than 107 even at VDD = 300 mV.