IEEE Journal of the Electron Devices Society (Jan 2023)

Monolithic Dual-Gate E-Mode Device-Based NAND Logic Block for GaN MIS-HEMTs IC Platform

  • Yuhao Zhu,
  • Fan Li,
  • Miao Cui,
  • Zhicheng Fang,
  • Ang Li,
  • Dongyi Yang,
  • Yinchao Zhao,
  • Huiqing Wen,
  • Wen Liu

DOI
https://doi.org/10.1109/JEDS.2023.3265372
Journal volume & issue
Vol. 11
pp. 230 – 234

Abstract

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In this work, dual-gate enhancement-mode (E-mode) device based NAND circuit (DG-NAND) and the NAND block with double E-mode devices (DD-NAND) are developed and fabricated based on the GaN MIS-HEMTs (metal-insulator-semiconductor-high-electron-mobility-transistors) platform. The DG-NAND circuit has an area of 0.118 mm2 with the probe pad, which is 24% lower than the area of the DD-NAND circuit. Both static and dynamic experimental results validate the advantages of performance improvement of NAND circuits designed by dual-gate technology at an input voltage of 9 V. This paper demonstrates the design potential of dual-gate NAND in an all-GaN MIS-HEMTs platform through compact design.

Keywords