Application of a Quantum-Well Silicon NMOS Transistor as a Folding Amplifier Frequency Multiplier

Abstract

This paper reports on the use of a single quantum well (QW) silicon NMOS transistor to generate a folded current-voltage transfer function that enables frequency doubling and tripling. The QW NMOS device is fabricated entirely on an industrially standard 45 nm technology node CMOS processing line. Quantum transport through the QW results in negative differential transconductances that fold the IDS-VG function. Using two such folds, time domain data shows frequency doubling up through the kHz range at room temperature, and Fourier analysis confirms that the output is dominated by the second harmonic of the input. Total harmonic distortion is approximately -14 dB. De-embedding the frequency response from parasitic cable and contact impedances suggests that the intrinsic doubling bandwidth of a QW NMOS transistor could be as high as 10 GHz if monolithically integrated into a circuit. The high frequency performance of the QW NMOS is limited by the relatively high transresistance magnitude of the device. Frequency tripling can also be shown using a single QW NMOS with three folds. This work helps establish the high frequency performance limitations of a QW NMOS device. It is also the first example of a silicon quantum device fabricated by mainstream CMOS technology being used in a circuit application.

Keywords

• CMOS process
• quantum well devices
• quantum CMOS