p-GaN Gate Enhancement-Mode HEMT Through a High Tolerance Self-Terminated Etching Process

Abstract

An enhancement-mode high-electron-mobility transistor with a p-GaN gate was fabricated by using a chemistry-ease Cl2/N2/O2-based inductively coupled plasma etching technique. This etching technique features a precise etching self-termination at the AlGaN barrier surface, which enables a broad process window with a large tolerance of etching time. With a post-annealing process, the property of two-dimensional electron gas (2DEG) can be restored to a high level after the etching. The mechanisms of etching self-termination and 2DEG recovery were clarified. The fabricated device exhibits a drain saturation current of 355 mA/mm with a threshold voltage of +1.1 V, an on/off ratio of 107, and a static on-resistance RON of 10 Ω·mm. Furthermore, normally-off operation of the device can be achieved across the wafer.

Keywords

• Enhancement-mode
• HEMT
• p-GaN gate
• self-terminated etching