IEEE Journal of the Electron Devices Society (Jan 2019)

Effects of Gate Stack Composition and Thickness in 2-D Negative Capacitance FETs

  • Yuh-Chen Lin,
  • Felicia McGuire,
  • Steven Noyce,
  • Nicholas Williams,
  • Zhihui Cheng,
  • Joseph Andrews,
  • Aaron D. Franklin

DOI
https://doi.org/10.1109/JEDS.2019.2922441
Journal volume & issue
Vol. 7
pp. 645 – 649

Abstract

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Negative capacitance (NC) field-effect transistors (FETs) with 2-D semiconducting channels have become increasingly attractive due to their ability to produce sub-60 mV/dec switching behavior in a physically scalable device. However, it has yet to be determined how gate control, including threshold voltage, of 2-D NC-FETs is impacted by gate dielectric composition, along with dielectric and ferroelectric layer thicknesses. Here, we show the threshold voltage shifts positively under increasing ferroelectric thickness and negatively with increasing dielectric thickness. This shifting behavior is observed in devices without an interfacial metal layer between the ferroelectric hafnium zirconium oxide (HfZrO2 or HZO) and dielectric. Because the interface between the ferroelectric and dielectric is critical in driving NC behavior, we also study 2-D NC-FETs with 4 nm HZO paired with different dielectrics. These results reveal that the HZO/Al2O3 interface is more favorable than either the HZO/ZrO2 or HZO/HfO2 interfaces. Finally, the impact of an interfacial metal layer is discussed by comparing the 2-D NC-FET performance of similar devices with and without this layer.

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