IEEE Journal of the Electron Devices Society (Jan 2019)

CJM: A Compact Model for Double-Gate Junction FETs

  • Nikolaos Makris,
  • Matthias Bucher,
  • Farzan Jazaeri,
  • Jean-Michel Sallese

DOI
https://doi.org/10.1109/JEDS.2019.2944817
Journal volume & issue
Vol. 7
pp. 1191 – 1199

Abstract

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The double-gate (DG) junction field-effect transistor (JFET) is a classical electron device, with a simple structure that presents many advantages in terms of device fabrication but also its principle of operation. The device has been largely used in low-noise applications, but also more recently, in power electronics. Furthermore, co-integration of JFET with CMOS technology is attractive. Physics-based compact models for JFETs are however scarce. In this paper, an analytical, charge-based model is established for the mobile charges, drain current, transconductances and transcapacitances of symmetric DG JFETs, covering all regions of device operation, continuously from subthreshold to linear and saturation operation. This charge-based JFET model (called CJM) constitutes the basis of a full compact model of the DG JFET for analog, RF, and digital circuit simulation.

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